In the prior art, as the wiring substrate on which an electronic component is mounted, there is the PGA (Pin Grid Array) type wiring substrate. In the PGA type wiring substrate, a plurality of electrode pads to which the electronic component is connected are provided on one surface, and also a plurality of lead pins which are inserted into sockets of the motherboard are aligned in grid-like type on the other surface and are provided to stand.
In Patent Literature 1 (Japanese Laid-open Patent Publication No 2001-217341), it is set forth that a bonding surface of the flange to which the lead pin is soldered is formed like a convex spherical shape, and a wetting extent-edge of the solder is extended beyond an outermost edge up to the position that does not reach the shaft portion in the surface opposite to the bonding surface, whereby constriction of the solder and a reduction of a bonding strength are prevented.
As explained in the column of the related art described later, when the semiconductor chip is reflow soldered to the upper side of the wiring substrate, to the lower side of which the lead pins are fixed by the solder layer, simultaneously the solder layer fixing the lead pins is reflown again by the heating process. At this time, an inclination of the lead pin which is arranged in an inclined state is corrected in the perpendicular direction by the reflow of solder and the gravitation.
In the round type lead pin, since an adequate amount of solder is arranged in the periphery of the side surface of the connection head portion, an enough amount of return can be obtained, and an inclination of the lead pin can be corrected.
However, in the flat type lead pin, since an amount of solder which is arranged in the periphery of the side surface of the connection head portion is small, an enough amount of return cannot be obtained, and in many cases the inclination failure is caused.